Cortex-A55
Application | ||
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IT and Software |
Description | ||
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Cortex-A55, built on DynamIQ technology, is designed for extreme scalability in constrained environments. It features the latest Armv8-A architecture extensions that introduce new NEON instructions for machine learning, advanced safety features and more support for Reliability, Accessibility and Serviceability (RAS). With a flexible design that meets requirements across multiple markets, the Cortex-A55 processor delivers greater performance, power efficiency and safety over its predecessor. Microarchitecture improvements provide more responsive user interactions for touchscreens and higher reaction speeds in autonomous automotive applications, for longer periods of sustained performance. Fine-grained power control ensures Cortex-A55 delivers high performance with superior efficiency. Configurable L2 cache achieves more than 50% reduced latency for memory accesses. L3 cache shared across up to eight Cortex-A55 CPUs within a single cluster. |
Product Properties
Extension
ISA Support
Superscalar
Neon / Floating Point Unit
Cryptography unit
Max number of CPUs in cluster
Physical addressing (PA)
L1 I-Cache / D-Cache
KB
L2 Cache
KB
L3 Cache
ECC support
LPAE
Bus interfaces
ACP
Perpheral port
Functional safety support
Security
Interrupts
Generic timer
PMU
Debug
CoreSight
Embedded trace macrocell
Packaging
Pricing
Unit | ||
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- |
Currency | ||
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- |
Value | ||
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- |
Documents
Product Champions
General Info
Listing Type | ||
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Product |
Published | ||
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May 23, 2021 |
Last Edited | ||
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May 25, 2021 |
Categories | ||
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IT |
